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Electronics and Electrical Engineering
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The University of Edinburgh
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Selected Papers and Reports
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The integration of simulation and response surface methodology
for the optimization of IC processes
Postscript (476,246)
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Using RSM Techniques to Contour Plot Response
Distributions of Semiconductor Processes
Postscript (34,899)
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A Comparison of Direct Monte-Carlo and DOE Simulations for Optimising IC
Processes
Postscript (86868)
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Integration of Costing, Yield and Performance Metrics
into the TCAD Environment through the Combination of DOE and RSM
Postscript (664052)
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A Defect Sensitivity Measurement Tool Enabling Comparison
of Multilevel Interconnection Strategies
Postscript (946520)
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HTML
Efficient Critical Area Algorithms and their Application to Yield
Improvement and Test Strategies
Postscript (675732)
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The Automatic Generation of Conformal IC Data for Interconnect Capacitance
Simulation.
Postscript (10112705)
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Parameter Sensitivity of Covariance Based Response Surfaces for Modelling IC Processes
Postscript
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Application of Covariance Structures to Improve the Fit of Response Surfaces to Simulation Data
PDF
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Application of Covariance based Models to Fit Response Surfaces to Experimental Data
Postscript
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Microelectronic Test Structures
PDF
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Revision Date: 1st Feb 1999